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Unit 3 Combinational Logic Design
3.1 Basic Logic Gates NOT, OR and AND
3.2 Universal Logic Gates NOR and NAND
3.3 EX-OR and EX-NOR Gates
3.4 Boolean Algebra:
3.3. I Postulates & Theorems
3.3.2 Canonical FomhSintfication of Logic Functions
3.5 Simplification of Logic Functioh "Using Karnaugh Map.
3.5.1 Analysis of SOP And
3.6 Implementation of Combinational LogiciFunctions
3.6.1 Encoders & Decoders
3.6.2 Half Adder, & Full Adder
3.7 Implementation of Data Processing Circuits
3.7. I Multiplexers and De-Multiplexers
3.7.2 Parallel Adder -Binary Adder-Parity Generator /Checker-
Implementation of Logical Functions Using Multiplexers.
3.8 Basic Concepts of Programmable Logic
3.8.1 PROM
3.8.2 EPROM
3.8.3 PAL
3.8.4 PLA
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